Semiconductor Manufacturing

Intel’s 11^th-generation core processor using its latest 10nm SuperFin process.

The CPU market is constantly growing. According to Yole Développement’s Processor Quarterly Market Monitor, the processor market generated more than US $60B in 2020, with more than 100 million CPUs shipped in Q1 2021. This market is competitive and dominated by a few major players, including Intel – whose next-generation processors could potentially increase the company’s market share.

Tiger Lake is the name of Intel’s 11^th-generation core processor. It is the latest laptop processor from Intel and uses the company’s 10nm SuperFin process technology and its 14nm processor chip. This ‘two-chip solution’ approach allows Intel to split off some functions into a less advanced, cheaper process node. The chips are designed for mainstream, powerful, ultralight laptops, and Intel’s Tiger Lake i7 processors have enhanced performance coupled with lower power consumption. Moreover, the chip includes Intel’s new XE graphics.

This 11^th-generation core processor uses a 10nm FinFET process with enhanced performance compared to the previous 10nm process. The chip includes a large, embedded graphic – in fact, the Intel Iris XE graphics section occupies close to a third of the chip area. For improved power management and low-power performance, the Intel Tiger Lake design includes several fully integrated voltage regulator blocks.  The Intel Tiger Lake i7 SoC also features a very large graphics processing unit.

A full teardown was conducted to provide insights regarding the Intel Tiger Lake i7 CPU, and this report details the die layout in the package and features multiple analyses, including the 3D x-ray images. A package analysis reveals a BGA package that integrates two processors in flip chip position. This package includes two of Intel’s chips: one CPU using 10nm SuperFin and another CPU using14nm FinFET. Our floorplan analysis reveals the high-level chip architecture and an estimation of IP block area. Our front-end analysis uses a high-resolution TEM cross-section to expose Intel’s 10nm process, along with delayering images, while our back-end analysis uses CT-scan (3D x-ray) to reveal the layout structure of the package and the dies. Furthermore, this report provides high-resolution images, a materials analysis, and a detailed manufacturing process. Lastly, an estimation of the wafer cost, die cost, and component cost is furnished.

Overview/Introduction

• Executive Summary
• Reverse Costing Methodology

Company Profile & Market Analysis

• Intel, Intel Products & Location
• Intel Core Processors
• Market Analysis and Processor Market

Package Analysis

• Summary of the Physical Analysis
• Package Analysis
  • Module Views
  • Package Dimensions
  • Package X-Ray Images
  • Package Cross-Section
• Processor Die 1
  • Die 1 View & Dimensions
  • Die 1 Delayering
  • Die 1 Die Process
  • Die 1 Die Cross-Section
  • Die 1 Die Process Characteristics
• Die 1 Floorplan and TEM analysis on FinFET
• Processor Die 2
  • Die 2 View & Dimensions
  • Die 2 Delayering
  • Die 2 Die Process
  • Die 2 Cross-Section
  • Die 2 Process Characteristics

Manufacturing Process

• Die 1 Front-End Process & Fabrication Unit
• Die 2 Front-End Process & Fabrication Unit
• Final Test & Packaging Fabrication Unit

Cost Analysis

• Summary of the Cost Analysis
• Yields Explanation & Hypotheses
• Processor Die 1
  • Die Front-End Cost
  • Die Probe Test, Thinning & Dicing
  • Die Wafer Cost
  • Die Cost
• Processor Die 2
  • Die Front-End Cost
  • Die Probe Test, Thinning & Dicing
  • Die Wafer Cost
  • Die Cost
• Intel Tiger Lake i7 Package
  • Packaging Cost
  • Component Cost

Estimated Selling Price

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