Memory

Intel’s Quad-Level Cell 3D NAND with 144 active wordlines in three decks, with CMOS under array and floating gate technology.

Huge volumes of data are generated daily and this data growth has created a strong demand for cost-effective, high-performance non-volatile memory. NAND revenue reached over $56 billion dollars in 2020 and bit growth is estimated at 38% between 2020 and 2021. This could drive NAND memory revenue up to $70 billion in 2021 according to the NAND Market Monitor, Q3 2021. Intel had a NAND market share of 9% in 2020.

The market’s first-ever 144-layer triple-level cell NAND design can store up to four bits per cell (QLC). Intel’s memory technology is unique, combining floating gate architecture with CMOS under array (CuA). Placing the CMOS under array allows Intel to produce 1024Gb chips with a density of over 12Gb/mm². Intel’s fourth-generation 3D NAND memory stacks over 160 wordlines. Floating gate technology uses a discrete-charge storage node, which results in improved NAND cell-data retention. QLC allows more data to be stored without occupying extra area on the chip.

This 144-layer QLC NAND memory has 50% higher bit-density compared to Intel’s 96-layer NAND memory. Intel continues to stack more wordlines and use QLC memory, resulting in higher storage potential while delivering more potential storage per NAND wafer at a lower manufacturing cost.

This report includes a full analysis of the SSD teardown and memory package, accompanied by optical and high-resolution SEM images of the package and die. The die cross-section reveals Intel’s three decks of alternating layers of wordlines and insulating material. The cross-section images reveal the NAND memory structure and the floating gate. EDX analysis allowing for material identification has been performed to reveal the materials used in the memory manufacturing process.   Also provided in this report is the manufacturing process of Intel’s 144-layer 3D NAND memory and the final package & assembly. Lastly, a cost analysis is furnished which includes an estimation of Intel’s 144-layer QLC, CuA NAND memory wafer, and die.

Introduction

• Executive Summary

Company Profile (Intel)

• Intel Financials
• Intel Products & Location
• Intel Floating Gate Technology
• 3D NAND Memories

Technology & Market Analysis

• NAND Revenue
• NAND Bit Shipment

Physical Analysis

• Intel 670p SSD Overview
• Package Views & Dimensions
• Package Opening
• Package Cross-Section
• Die Views & Dimensions
• Die Cross-Section
• Die Delayering
• Die Process & Patents

Manufacturing Process

• NAND Die Front-End Process & Fab Unit
• Assembly & Final Test

Cost Analysis

• Yields
• NAND Memory Front-End Cost
• NAND Memory Probe Test & Dicing
• NAND Wafer Cost
• NAND Die Cost
• NAND Component Cost (512GB)
• Cost per GB

Price

• NAND Memory Price (512GB)

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