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Cavendish Kinetics 32CK417R

Product code
EUR 2 990
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Cavendish Kinetics promises to transform the RF stage in mobile phone with its MEMS tunable capacitors. Today the 32CKxxx family is optimized for the antenna tuning function. And Cavendish Kinetics wants to use its SmarTune technology in RF filters and Tx antenna switch.

The Cavendish Kinetics components are integrated in Nubia Smartphones.

With a very small footprint, less than to 2mm², the 32CK417R is the smallest antenna tuner on the market. Moreover, the specific SmarTune technology offers a fine capability to tune the capacitor value, 32 steps between the min and max value to have a seamless tuning. The report provides all details on the structure of the component and the supply chain to produce this astonishing MEMS.

The 32CK417R integrates an ASIC to drive the variable capacitor and thanks to a SPI or MIPI bus communication facilitating the integration for phone manufacturers.

The Wafer Level Packaging, from STATS ChipPAC, reduces the insertion loss, 5x lower than RF SOI solution.

All the wafer manufacturing process, ASIC part and MEMS part, are performed by Tower Jazz.

The report includes a detailed technology and cost analysis describing the innovations of Cavendish Kinetics and TowerJazz of this unique Antenna Tuner.

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Overview / Introduction

Cavendish Company Profile

Physical Analysis

  • Physical Analysis Methodology
  • Package
    • Package Characteristics Marking & Pin-out
    • Package Opening & Wire Bonding Process
    • Package Cross-Section
  • MEMS Die
    • View, Dimensions & Marking
    • Bond Pad Opening & Bond Pad
    • Capacitor Area
    • Capacitor Cross-Section
    • Capacitor Delayering
    • Process Characteristics
  • ASIC Die
    • View, Dimensions & Marking
    • Delayering
    • Main Blocks Identification
    • Cross-Section
    • Process Characteristics
  • Comparison Wispry A210

Manufacturing Process Flow

  • Global Overview
  • ASIC Front-End Process
  • Tunable Capacitors Process Flow
  • Wafer Fabrication Unit
  • Packaging Process Flow
  • Package Assembly Unit

Cost Analysis

  • Synthesis of the cost analysis
  • Main steps of economic analysis
  • Yields Hypotheses
  • ASIC Front-End Cost
  • MEMS Front-End Cost
  • MEMS Front-End Cost per process steps
  • MEMS Back-End 0 : Probe Test & Dicing
  • Back-End : Wafer Level Packaging Cost
  • Back-End : Wafer Level Packaging Cost per Process Steps
  • Back-End : Final Test
  • 32CK417R Component Cost

Price Analysis

  • Cavendish Financial Results
  • 32CK147R Selling Price Estimation
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