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Advanced RF SiPs for Cellphones – Webcast

Free Webcast – April 18, 2019 at 9 AM CET – 3 PM UTC +8

5G is pushing innovation in RF front-end Systems-in-Packages.

Not able to attend the webcast ? You can access the replay and the materials with the same registration link during one year.


The fifth generation (5G) telecommunication standard will totally redefine radio frequency (RF) front-end interactions between networks and modems. The new RF bands where 5G is deployed, sub-6 GHz and millimeter (mm)-wave, pose big challenges for the industry.

Long-Term Evolution (LTE) has led to complex architecture in today’s mobile phones, mostly due to carrier aggregation and because RF board area and available antenna space have been reduced. This has led to a densification trend, with more handset Original Equipment Manufacturers (OEMs) adopting power amplifier modules and implementing new techniques like antenna-sharing between LTE and WiFi. More densification in front-end modules will be required to enable new band integration. Without tight integration 5G New Radio (NR) in the mmWave spectrum won’t be able to deliver the multi-gigabit speeds that are the key Unique Selling Point (USP) of 5G.

Advanced multi-die System-in-Package (SiP) packaging offers a large set of key technologies to address all flavors of 5G requirement that will enable its implementation in mobile devices. We will forecast market trends and challenges of packaging for RF front-end components in mobile as we enter the 5G era, including the supply chains and strategies of RF SiP manufacturers.

Where? On your computer

When? April 18th, 2019 at 9 AM CET – 3 PM UTC +8

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 Santosh Kumar is currently working as Principal Analyst and Director Packaging, Assembly & Substrates, Yole Korea. He is involved in the market, technology and strategic analysis of the microelectronic assembly and packaging technologies. His main interest areas are advanced IC packaging technology including equipment & materials. He is the author of several reports on fan-out / fan-in WLP, flip chip, and 3D/2.5D packaging.
He received the bachelor and master degree in engineering from the Indian Institute of Technology (IIT), Roorkee and University of Seoul respectively. He has published more than 40 papers in peer reviewed journals and has obtained 2 patents. He has presented and given talks at numerous conferences and technical symposiums related to advanced microelectronics packaging.


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